Renesas Electronics /R7FA6T2BD /SPI_B0 /SPCR

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Interpret as SPCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)SPE 0 (0)SPPE 0 (0)SPOE 0 (0)PTE 0 (0)SCKASE 0 (0)BFDS 0 (0)MODFEN 0 (0)SPEIE 0 (0)SPRIE 0 (0)SPIIE 0 (0)SPDRES 0 (0)SPTIE 0 (0)CENDIE 0 (0)SPMS 0 (0)SPFRF 0 (Others)TXMD 0 (0)MSTR 0 (0)BPEN

SPPE=0, SPFRF=0, SPE=0, SPEIE=0, MSTR=0, SPTIE=0, SPOE=0, SPRIE=0, SCKASE=0, MODFEN=0, BPEN=0, SPMS=0, TXMD=Others, BFDS=0, PTE=0, SPIIE=0, CENDIE=0, SPDRES=0

Description

SPI Control Register

Fields

SPE

SPI Function Enable

0 (0): SPI function is disabled.

1 (1): SPI function is enabled.

SPPE

Parity Enable

0 (0): A parity bit is not added to transmit data. Received-data parity check is not performed.

1 (1): A parity bit is added to transmit data. Received-data parity check is performed.

SPOE

Parity Mode

0 (0): Even parity is used for transmission and reception.

1 (1): Odd parity is used for transmission and reception.

PTE

Parity Self-Diagnosis Enable

0 (0): Parity circuit self-diagnosis function is disabled.

1 (1): Parity circuit self-diagnosis function is enabled.

SCKASE

RSPCK Auto-Stop Function Enable

0 (0): RSPCK auto-stop function is disabled.

1 (1): RSPCK auto-stop function is enabled.

BFDS

Between Burst Transfer Frames Delay Select

0 (0): Delay (RSPCK delay, SSL negation delay and next-access delay) between frames is inserted in burst transfer

1 (1): Delay between frames is not inserted in burst transfer.

MODFEN

Mode Fault Error Detection Enable

0 (0): Mode fault error detection is disabled.

1 (1): Mode fault error detection is enabled.

SPEIE

SPI Error Interrupt Enable

0 (0): SPI error interrupt request is disabled.

1 (1): SPI error interrupt request is enabled.

SPRIE

SPI Receive Buffer Full Interrupt Enable

0 (0): SPI receive buffer full interrupt request is disabled.

1 (1): SPI receive buffer full interrupt request is enabled.

SPIIE

SPI Idle Interrupt Enable

0 (0): Idle interrupt request is disabled.

1 (1): Idle interrupt request is enabled.

SPDRES

SPI receive data ready error select

0 (0): Receive data full interrupt

1 (1): Error interrupt

SPTIE

SPI Transmit Buffer Empty Interrupt Enable

0 (0): SPI transmit buffer empty interrupt request is disabled.

1 (1): SPI transmit buffer empty interrupt request is enabled.

CENDIE

SPI Communication End Interrupt Enable

0 (0): Communication end interrupt request is disabled.

1 (1): Communication end interrupt request is enabled.

SPMS

SPI Mode Select

0 (0): SPI operation (4-wire)

1 (1): Clock synchronous operation (3-wire)

SPFRF

SPI Frame Format Select

0 (0): Motorola-SPI

1 (1): TI-SSP

TXMD

Communication Mode Select

0 (00): Transmit-Receive

0 (Others): Receive only

1 (01): Transmit only

MSTR

SPI Master/Slave Mode Select

0 (0): Slave mode

1 (1): Master mode

BPEN

Synchronization Circuit Bypass Enable

0 (0): Non-Bypass

1 (1): Bypass

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